Field of the Invention
This invention relates generally to tiled arrays of hybrid assemblies, and more particularly to methods of forming such arrays with very small gaps between assemblies.
Description of the Related Art
Many applications require that an array of hybrid assemblies be tiled on a common baseplate. For example, an imaging device may require a tiled array of hybrid assemblies, each of which includes a detector chip and a readout integrated circuit (ROIC).
In some applications, such as an imaging device, it is preferred or essential that the hybrid assemblies in the array be located close to each other—within 10 μm in some cases. Achieving this can be difficult. For example, one or more dies making up a hybrid assembly may need to be sawed, but this can result in rough sidewalls that limit how closely together the assemblies can be located. Another constraint is that the edge of the saw cut cannot be too close to active devices due to the damage the sawing produces, further limiting how closely-spaced active devices on adjacent assemblies can be. In addition, if the hybrid assemblies are conventionally affixed to the baseplate with epoxy, locating the assemblies too closely together can result in epoxy squirting out of the gaps between the assemblies.
A tiled array of hybrid assemblies may also give rise to thermal issues. For example, adjacent dies having different thermal expansion coefficients may result in stress that degrades the performance of one or both of the dies. One way in which this is addressed is shown in FIG. 1. Here, a detector die 1 is interconnected with an ROIC die 2 via a layer of indium bumps and epoxy 3. To help equalize the thermal expansion coefficients between dies 1 and 2, the dies may be affixed to a metal layer 4 with an epoxy layer 5, which is in turn affixed to a silicon layer 6 with an epoxy layer 7, which is then affixed to a baseplate 8 with an epoxy layer 9. However, this approach requires a costly and complex fabrication process, with the multiple epoxy layers located between die 2 and baseplate 8 degrading thermal performance.